Showing posts with label 8255PPI. Show all posts

intel 8255 pin diagram

                                           

PA0- PA7: port a, it is 8 bit bi-directional i/o pins.

PB0-PB7: port b, It is 8 bit bi-directional i/o pins.

PC0-PC7: port c, It is also a bi-directional i/o pins. It is divided in two sections: PC0-PC3 and PC4-PC7. These two section can be used to transfer 4 bit data.

D0-D7: data pins for data transfer

RESET: reset input, It is used to reset 8255 ic.

RD-bar: read input, it is used to coordination with other signals to send data through data lines.

WR-bar: write input, used in coordination with other signals to send data to 8255.

A1-A0: address pins

00-Port A
01-Port B
10-Port C
11-Control Reigster

CS-bar: chip select

8255 block diagram

                            

It has been divided in two section: Group A and Group B. Each of 12 bits.

Group A: PA0-PA7 & PC4-PC7(port C upper)

Group B: PB0-PB7 & PC0-PC3(por C lower)

Each group can be programmed separately.

The GA and GB control block receives commands from r/w control logic to accept bit pattern from CPU.

GA(Group A) controls GA ports and GB controls GB ports.

The function of port a and port b is decided by the control bit pattern available in GA and GB control register.

Function of port a and b are also dependent on the mode of operation.

Port C can be programmed separately for port c upper and port c lower.

The port C function is also dependent on the mode of operation.

It can be used as simple i/o, handshaking signals and status signal inputs.

8255 programmable periferal interface



8255 is a programmable peripheral interface.
It contains three i/o port that can be programmed in different mode.
It is a general purpose programmable parallel i/o device.
It contains s a control register that can be programmed to control the function of port as well as it can also control that which mode they should operate.
It is a programmable parallel i/o device.
It consists of three input/output ports each of 8 bits. It has been arranged as two 8 bit ports and two 4 bit ports.
It has been arranged in two groups each of 12 bits.
It is TTL compatible also.
It also provides facility for the direct set and reset for port C.

It can operate in three modes:
1 Mode 0
2 Mode 1
3 Mode 2

Labels

- Copyright © 8085 Microprocessor -Metrominimalist- Powered by Blogger - Designed by Johanes Djogan -